1. Field of the Invention
The present invention generally relates to a shallow trench isolation (STI) and method of manufacturing the same, and more particularly, to a shallow trench isolation with gradual sidewalls and method of manufacturing the same.
2. Description of the Prior Art
The advent of micro-miniaturization, or the ability to fabricate semiconductor devices with sub-micron features, has resulted in the migration from LOCOS, (local oxidation of silicon), isolation technology to an STI isolation technology. Narrow active device regions, comprising sub-micron features become difficult to maintain when isolation regions are formed via LOCOS technology. Bird beak formation, or encroachment of the silicon dioxide isolation region obtained via thermal oxidation procedures, into the adjacent silicon regions result in undesirable consumption of the designed active device region. The use of STI allows the design dimensions of the active device region to be maintained due to the absence of a thermal oxidation procedure used to grow a thick silicon dioxide isolation region. The STI regions are formed via definition of shallow trench shapes in a top portion of a semiconductor substrate, followed by insulator filling and planarization procedures.
The STI technology while not consuming adjacent silicon of an active device region, however, presents other unwanted phenomena, again at the isolation region-semiconductor interface. The dry etch procedures used to define the shallow trench shapes in a top portion of the semiconductor substrate create a sharp corner in the active device region at the STI-semiconductor interface. The sharp corner can result in an unwanted high electric field region for the active device region, translating to deleterious device parameters such as sub-threshold leakage. This phenomenon would become more critical in the 90 nm Bipolar-CMOS-DMOS (BCD) device, wherein the STI structure would be shallower and steeper with an even sharper corner profile.